Member / メンバー

Kentaro Sano is the team leader of the processor research team at RIKEN Center for Computational Science (R-CCS) since 2017, responsible for research and development of future high-performance processors and systems. His research interests include data-driven and spatial-parallel processor architectures such as a coarse-grain reconfigurable array (CGRA), FPGA-based high-performance reconfigurable computing, high-level synthesis compilers and tools for reconfigurable custom computing machines, and system architectures for next-generation supercomputing based on the data-flow computing model.

Tomohiro Ueno received Master’s and Ph.D. degrees from Graduate School of Information Sciences at Tohoku University. He received a JSPS Research Fellowship DC2 during the doctoral course. After completing the doctoral program, he participated in the ImPACT project by the Japanese Cabinet Office and researched about image recognition by using FPGAs. He has researched about communication system of high-performance FPGA cluster as a postdoctoral researcher at RIKEN Center for Computational Science since 2017. His research interests include the areas of information theory, data compression, high-performance computing, reconfigurable computing, and network systems.

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Research scientist and former INTEL hardware engineer Carlos Cortes received Master’s and Ph.D. degrees from the Graduate School of Information and Computer Science at KEIO University, Japan.
He received a Monbukagakusho scholarship from the Ministry of Education, Culture, Sports, Science, and Technology (MEXT), Japan, for his master course and a Research fellowship from Japan Society for the Promotion of Science (JSPS) during his doctoral course.
During his doctoral course, he won the innovation contests “KEIO-KLL Innovation Idea”, Japan and “Innovatec” of Technical University of Madrid (UPM), Spain, and he also collaborated with the Karlsruhe Institute of Technology (KIT), Germany.
His research interests include SoC design, VLSI, Computer Micro-Architecture, High-Performance Computing, and Reconfigurable Computing.

Emanuele Del Sozzo received my Ph.D. from Politecnico di Milano in Italy, working at NECSTLab as part of the Computer Architecture group inside Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB). He also received an M.Sc. degree in Computer Science from the University of Illinois at Chicago (UIC) and an Alta Scuola Politecnica Diploma. He held a visiting Ph.D. position at Imperial College London in 2016 and at MIT in 2017. In addition, he was a summer intern at ARM Research in 2018, PostDoc at IBM Research through 2019, and PostDoc at Politecnico di Milano from 2020 to April 2022. His research focuses on reconfigurable architectures, hardware accelerators, and abstraction toolchains.